Renesas Electronics /R7FA6M3AH /SRC /SRCODCTRL

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Interpret as SRCODCTRL

15 1211 87 43 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 (00)OFTRG 0 (0)OEN 0 (0)OED 0 (0)OCH

OFTRG=00, OCH=0, OED=0, OEN=0

Description

Output Data Control Register

Fields

OFTRG

Output FIFO Data Trigger Number

0 (00): 1

1 (01): 4

2 (10): 8

3 (11): 12

OEN

Output Data FIFO Full Interrupt Enable

0 (0): Output data FIFO full interrupt is disabled.

1 (1): Output data FIFO full interrupt is enabled.

OED

Output Data Endian

0 (0): Endian formats are the same between the chip and input data.

1 (1): Endian formats are different between the chip and input data.

OCH

Output Data Channel Exchange

0 (0): Does not exchange the channels (the same order as data input)

1 (1): Exchanges the channels (the opposite order from data input)

Links

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